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 PRELIMINARY CUSTOMER PROCUREMENT SPECIFICATION
1
Z90219/213/212/211/218
Z8(R) DIGITAL TELEVISION CONTROLLERS
FEATURES
Device Z90211 Z90218 Z90212 Z90213 Z90219 ROM (KB) 16 (OTP) 8 12 16 32 (ext.) RAM* (Bytes) 237 237 237 237 237 I/O Lines 20 20 20 20 N/A Voltage Range 4.5V to 5.5V 4.5V to 5.5V 4.5V to 5.5V 4.5V to 5.5V 4.5V to 5.5V
s s s s
1
On-Chip Infrared (IR) Capture Registers Four Channel 3-bit Analog-to-Digital Converter Twenty General Purpose I/O Pins I2C Serial Communication Port)
Note: OTP and Z9021x products under development
On Screen Display (OSD) Section
s
Z8-Based CMOS Microcontroller for Consumer Television, Cable Box, and Satellite Receiver Applications.
s s s s
Supports Displays up to 10 rows by 24 Columns with 256 Characters Character Cell Resolution of 14 Pixels by 18 Scan lines Variable Inter-row Spacing from 0-15 Horizontal Scan Lines Foreground and Background Programmable by Character Colors Fully
s s
42-Pin SDIP Package Z8 Microcontroller Core at 6 MHz Mask ROM sizes Available in 8, 12 and 16 Kbytes Eleven Pulse Width Modulators
(R)
s
GENERAL DESCRIPTION
The Z9021x Digital Television Controller (DTC) family is Zilog's latest and most powerful Z8-based DTC product offering. These parts feature larger system RAM and ROM options, together with a host of new features including a new color palette system, flexible inter-row spacing, higher character cell resolution, background mesh effect, dedicated I.R. capture registers, on-chip Analog-to-Digital conversion, and a hardware Master mode I2C interface. The familiar Z8 core in combination with these advanced features makes the Z9021x family an ideal choice for low to midrange televisions in both PAL and NTSC markets. The Z9021x family consists of two basic device types; Z9020x and Z9021x. The only difference between the two types is the presence of a hardware I2C serial communication port and half-tone OSD circuitry on the Z9021x family. Of course I2C communication is supported on the Z9020x family in software with the dedication of any two I/O pins to the task. The Z9021x family takes full advantage of the Z8's expanded register file space to offer greater flexibility in On Screen Display creation.
CP96TEL2400
PRELIMINARY
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Z90219/213/212/211 Z8(R) Digital Television Controllers
Zilog
BLOCK DIAGRAM
XTAL1 XTAL2 /RESET
Oscillator
WDT RESET Counter Timer Counter Timer 3-bit ADC IR Counter Port3
8/12/16K Byte Program ROM Port2 Z8 CPU Core
ADC0 ADC1 ADC2 ADC3 IRIN P30 P31 P34 P35
P20 P21 P22 P23 P24 P25 P26 P27
Register File
Port4
256 Byte PWM 11 (14-bit)
P40 P41 P42 P43 P44 P45 P46 P47
PWM11 PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 PWM7 PWM8 PWM9 PWM10 P1 P2 P3 P4 P5 P6 P7
PWM 1 to PWM 10 (6-bit)
Character RAM 240 by 11-bit & 10 by 8-bit
I2C Interface
SCLK0 SDATA0 SCLK1 SDATA1 Z9021x ONLY OSDX1 OSDX2 HSync VSync R G B VBlank HLFTN Z9021x ONLY
On Screen Display Output Port
Character ROM
9K by 7-bit
Figure 1. Functional Block Diagram
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PRELIMINARY
CP96TEL2400
Zilog
Z90219/213/212/211 Z8(R) Digital Television Controllers
PIN IDENTIFICATION
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PWM11/P7 PWM6/P6 PWM5/P5 PWM4/P4 PWM3/P3 PWM2/P2 PWM1/P1 P40 P34/ADC3 P35/ADC2 P41/ADC1 P31/ADC0 AGND P42 P43 P30 P44/PWM7 P45/PWM8 P46/PWM9 P47/PWM10 P20/HLFTN
42
Z9021x (Top View)
21
22
P27/SDATA1 P26/SCLK1 P25/SDATA0 P24/SCLK0 P23 P22 IRIN P21 VCC /RESET XTAL2 XTAL1 GND OSDX2 OSDX1 VSYNC HSYNC VBLANK R G B
1
CP96TEL2400
PRELIMINARY
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Z90219/213/212/211 Z8(R) Digital Television Controllers
Zilog
PIN IDENTIFICATION
Table 1. Z9021x 42L SDIP Package Pin Function Pin Number I/O/PWR Reset State PWR PWR I O O O I I I I O I I I O I O I I O O I I Name VCC GND,AGND IRIN PWM11 PWM[10:1] P[1:7] P2[7:0] HLFTN SDATA0,1 SCLK0,1 P3[5:4] P3[1:0] P4[7:0] XTAL1 XTAL2 OSDX1 OSDX2 HSYNC VSYNC VBLANK R,G,B ADC[3:0] /RESET
+5 Volts 34 PWR 0 Volts 30,13 PWR Infra Red remote capture input 36 I 14-bit Pulse Width Modulator 1 O output 6-bit Pulse Width Modulator 20,19,18,17,2,3,4, O output 5,6,7 Fixed output ports 7,6,5,4,3,2,1 O Bit programmable 42,41,40,39,38,37, I/O Input/Output ports 35,21 Half tone output 21 O 2 I C Data 40,42 I/O I2C Clock 39,41 O Fixed output ports 10,9 O Fixed input ports 12,16 I Bit programmable 20,19,18,17,15,14, I/O Input/Output ports 11,8 Crystal oscillator input 31 I Crystal oscillator output 32 O Dot clock oscillator input 28 I Dot clock oscillator output 29 O Horizontal Sync 26 I Vertical Sync 27 I Video blank 25 O Video R,G,B 24,23,22 O 3-bit Analog to Digital 9,10,11,12 AI converter input Device reset 33 I
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PRELIMINARY
CP96TEL2400
Zilog
Z90219/213/212/211 Z8(R) Digital Television Controllers
ABSOLUTE MAXIMUM RATINGS
Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; operation of the device at any condition above those indicated in the operational secTable 2. Symbol Vcc Vi Vo Ioh Ioh Iol Iol Ta TSTG Parameters Power Supply Voltage Input Voltage Output Voltage Output Current High Output Current High Output Current Low Output Current Low Operating Temperature Operating Temperature Min -0.3 -0.3 -0.3 Max +7 Vcc+0.3 Vcc+0.3 -10 -100 20 200 0 -55 70 150 Units V V V mA mA mA mA
oC oC
tions of these specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability
1
Notes
per pin per device per pin per device
CP96TEL2400
PRELIMINARY
5
Z90219/213/212/211 Z8(R) Digital Television Controllers
Zilog
DC CHARACTERISTICS
TA =0oC to + 70oC; VCC = +4.5V to +5.5V; F OSC = 6MHz Table 3. Symbol Vcc Vih Vil Vihc Vilc Voh Vol Vhy Iir Iil Iol Icc Icc1 Icc2 Parameter Min Typical 5.00 3.0 1.48 3.2 0.98 4.75 0.16 0.8 -46 -3.0 0.01 0.02 13.2 3.2 0.1 -80 3.0 3.0 20 6 10 0.4 Max 5.25 Vcc 0.2Vcc Vcc 0.07Vcc Units V V V V V V V V uA uA uA mA mA uA Vrl=0V 0V,Vcc 0V,Vcc All inputs at rail;outputs floating All inputs at rail;outputs floating All inputs at rail;outputs floating Ioh=-0.75mA Iol=1.00mA Conditions
Power Supply 4.75 Voltage Input Voltage High 0.7Vcc Input Voltage Low 0 Input XTAL/Osc in 0.8Vcc High Input XTAL/Osc In Low Output Voltage Vcc-0.4 High Output Voltage Low Schmitt Hysteresis 0.1Vcc Reset Input Current Input Leakage Supply Current Sleep Mode Current Stop Mode Current
Tri-State Leakage -3.0
Note: Typical values measured at 25oC. Minimum and Maximum values given from 0oC to 70oC.
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PRELIMINARY
CP96TEL2400
Zilog
Z90219/213/212/211 Z8(R) Digital Television Controllers
AC CHARACTERISTICS
Table 4. No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Symbol T pC TrC, TfC TwC TwTinL TwTinH TpTin TrTin, TrTin TwIL TwIH TdPOR TdLVIRES TwRES TdHsOl TdHsOh Parameter Input clock period Clock input raise and fall Input clock width Timer input low width Timer input high width Timer input period Timer input raise and fall Int request input low Int request input high Power-On reset delay 70 3TpC 25 100 ms ns 35 70 3TpC 8TpC 100 ns ns Min 166 Max 1000 25 Unit ns ns ns ns
1
Low voltage detect to 200 internal RESET condition Reset minimum width 5TpC Hsync start to Vosc stop Hsync start to Vosc start 2TpV 3TpV 1TpV
CP96TEL2400
PRELIMINARY
7
Z90219/213/212/211 Z8(R) Digital Television Controllers
Zilog
AC TIMING DIAGRAMS
7 5
1
3
XTAL1
3 2 2
TIN
4 6
IRQN
8 9
Vcc
10 11
Internal/RESET
12
External/RESET
HSYNC
13 14
OSCX2
Figure 2. Timing Diagram
8
PRELIMINARY
CP96TEL2400
Zilog
Z90219/213/212/211 Z8(R) Digital Television Controllers
1
(c) 1997 by Zilog, Inc. All rights reserved. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of Zilog, Inc. The information in this document is subject to change without notice. Devices sold by Zilog, Inc. are covered by warranty and patent indemnification provisions appearing in Zilog, Inc. Terms and Conditions of Sale only. Zilog, Inc. makes no warranty, express, statutory, implied or by description, regarding the information set forth herein or regarding the freedom of the described devices from intellectual property infringement. Zilog, Inc. makes no warranty of merchantability or fitness for any purpose. Zilog, Inc. shall not be responsible for any errors that may appear in this document. Zilog, Inc. makes no commitment to update or keep current the information contained in this document.
Zilog's products are not authorized for use as critical components in life support devices or systems unless a specific written agreement pertaining to such intended use is executed between the customer and Zilog prior to use. Life support devices or systems are those which are intended for surgical implantation into the body, or which sustains life whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. Zilog, Inc. 210 East Hacienda Ave. Campbell, CA 95008-6600 Telephone (408) 370-8000 FAX 408 370-8056 Internet: http://www.zilog.com
CP96TEL2400
PRELIMINARY
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Z90219/213/212/211 Z8(R) Digital Television Controllers
Zilog
10
PRELIMINARY
CP96TEL2400


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